1. Technical Field
The present invention relates to a system and method to optimize multi-core microprocessor performance using voltage offsets. More particularly, the present invention relates to a system and method to internally generate processor core optimum supply voltages within a device by using voltage offset networks to produce specific offset values for each processor core.
2. Description of the Related Art
Processing devices today include multiple “cores” in order to achieve a higher performance level. These cores may work together, or individually, to execute particular functions within an application. For example, a multi-core processing device may include multiple digital signal processor cores in order to effectively execute highly computational tasks, such as with a gaming application.
One aspect of a processor core's performance is based upon its supply voltage. A processor core's “optimum” supply voltage is a voltage that allows a processor to run at a specified performance at the lowest possible power. With a multi-core device, each processor core requires its own optimum supply voltage in order for the multi-core device to perform at its optimum performance level. A challenge found is that each processor core may require a specific supply voltage due to different core types and process variations. For example, a multi-core device may include core A, core B, core C, and core D, in which their optimum supply voltages are 1.73V, 1.84V, 1.54V, and 1.95V, respectively.
One approach for providing optimum supply voltages to individual processor cores is by including separate voltage planes within the multi-core device for each supply voltage. For example, if a device includes four processor cores, the device also includes four separate voltage planes. A challenge found with this approach, however, is that each voltage plane is connected to different pins on the device for receiving different external supply voltages, thus reducing the amount of pins that the device has available for other functions. Using the example described above, the multi-core device is required to dedicate at least four separate pins to the four different supply voltages.
In addition, since the device receives a specific supply voltage for each processor core, the package and the circuit board in which the multi-core device resides must also provide each of the specific supply voltages. Existing art provides the specific supply voltages by using one voltage regulator module per required supply voltage. Using the example described above, the circuit board in which the four core device resides would include four voltage regulator modules to provide the four specific supply voltages. The package also contains four separate voltage planes to supply the chip. A challenge found with this approach is that using multiple voltage regulator modules increases production cost as well as board layout complexity. In addition, the extra power planes in the package also increase package cost and complexity.
Another approach that existing art uses with multi-core devices is to simply supply a single supply voltage to each processor core. While this approach may minimize cost and simplify board layout, the result is a device that does not operate at its optimum performance level.
What is needed, therefore, is a system and method to provide individual supply voltages to each processor core within a multi-core device while, at the same time, minimizing circuit board layout complexities and production cost.